Working temp sensing
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35
.cargo/config.toml
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35
.cargo/config.toml
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[build]
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target = "thumbv6m-none-eabi"
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# Target specific options
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[target.thumbv6m-none-eabi]
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# Pass some extra options to rustc, some of which get passed on to the linker.
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#
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# * linker argument --nmagic turns off page alignment of sections (which saves
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# flash space)
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# * linker argument -Tlink.x tells the linker to use link.x as the linker
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# script. This is usually provided by the cortex-m-rt crate, and by default
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# the version in that crate will include a file called `memory.x` which
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# describes the particular memory layout for your specific chip.
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# * no-vectorize-loops turns off the loop vectorizer (seeing as the M0+ doesn't
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# have SIMD)
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rustflags = [
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"-C", "linker=flip-link",
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"-C", "link-arg=--nmagic",
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"-C", "link-arg=-Tlink.x",
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"-C", "link-arg=-Tdefmt.x",
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# Code-size optimizations.
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# trap unreachable can save a lot of space, but requires nightly compiler.
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# uncomment the next line if you wish to enable it
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# "-Z", "trap-unreachable=no",
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"-C", "no-vectorize-loops",
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]
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# This runner will make a UF2 file and then copy it to a mounted RP2040 in USB
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# Bootloader mode:
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# runner = "elf2uf2-rs -d"
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# This runner will find a supported SWD debug probe and flash your RP2040 over
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# SWD:
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runner = "probe-rs run --chip RP2040"
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