commit cb9d2e0c0f492d5d0fdf3d79ee41999b073f42f2
Author: JP Stringham <jp@bloomdigital.to>
Date:   Thu Jan 22 18:59:05 2026 -0500

    Initial commit

diff --git a/.cargo/config.toml b/.cargo/config.toml
new file mode 100644
index 0000000..a492de7
--- /dev/null
+++ b/.cargo/config.toml
@@ -0,0 +1,39 @@
+[build]
+target = "thumbv6m-none-eabi"
+
+# Target specific options
+[target.thumbv6m-none-eabi]
+# Pass some extra options to rustc, some of which get passed on to the linker.
+#
+# * linker argument --nmagic turns off page alignment of sections (which saves
+#   flash space)
+# * linker argument -Tlink.x tells the linker to use link.x as the linker
+#   script. This is usually provided by the cortex-m-rt crate, and by default
+#   the version in that crate will include a file called `memory.x` which
+#   describes the particular memory layout for your specific chip. 
+# * no-vectorize-loops turns off the loop vectorizer (seeing as the M0+ doesn't
+#   have SIMD)
+rustflags = [
+  "-C", "linker=flip-link",
+  "-C", "link-arg=--nmagic",
+  "-C", "link-arg=-Tlink.x",
+  "-C", "link-arg=-Tdefmt.x",
+
+  # Code-size optimizations.
+  #   trap unreachable can save a lot of space, but requires nightly compiler.
+  #   uncomment the next line if you wish to enable it
+  # "-Z", "trap-unreachable=no",
+  "-C", "no-vectorize-loops",
+]
+
+# This runner will make a UF2 file and then copy it to a mounted RP2040 in USB
+# Bootloader mode:
+# runner = "elf2uf2-rs -d"
+
+# This runner will find a supported SWD debug probe and flash your RP2040 over
+# SWD:
+runner = "probe-rs run --chip RP2040 --protocol swd"
+
+[env]
+DEFMT_RTT_BUFFER_SIZE = { value = "4096", force = true }
+DEFMT_LOG = { value = "info", force = true }
\ No newline at end of file
diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..4b1d491
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,3 @@
+/target
+
+.DS_Store
\ No newline at end of file
diff --git a/.vscode/settings.json b/.vscode/settings.json
new file mode 100644
index 0000000..30654ba
--- /dev/null
+++ b/.vscode/settings.json
@@ -0,0 +1,6 @@
+{
+  "rust-analyzer.cargo.target": "thumbv6m-none-eabi",
+  "rust-analyzer.check.allTargets": false,
+  "editor.defaultFormatter": "rust-lang.rust-analyzer",
+  "editor.formatOnSave": true,
+}
\ No newline at end of file
diff --git a/Cargo.lock b/Cargo.lock
new file mode 100644
index 0000000..8a24ab6
--- /dev/null
+++ b/Cargo.lock
@@ -0,0 +1,607 @@
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+ "proc-macro2",
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+ "unicode-ident",
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+ "thiserror-impl",
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diff --git a/Cargo.toml b/Cargo.toml
new file mode 100644
index 0000000..edf89cf
--- /dev/null
+++ b/Cargo.toml
@@ -0,0 +1,17 @@
+[package]
+name = "pico-transistor-tester"
+version = "0.1.0"
+edition = "2024"
+
+[dependencies]
+cortex-m = { version = "0.7.7", features = [ "critical-section-single-core" ] }
+cortex-m-rt = "0.7.5"
+defmt = "1.0.1"
+defmt-rtt = "1.0.0"
+embedded-hal = "1.0.0"
+panic-probe = { version = "1.0.0", features = [ "print-rtt" ]}
+rp2040-boot2 = "0.3.0"
+rp2040-hal = "0.11.0"
+
+[features]
+logging = []
\ No newline at end of file
diff --git a/memory.x b/memory.x
new file mode 100644
index 0000000..fe3ce49
--- /dev/null
+++ b/memory.x
@@ -0,0 +1,13 @@
+MEMORY {
+    BOOT_LOADER : ORIGIN = 0x10000000, LENGTH = 0x100
+    FLASH : ORIGIN = 0x10000100, LENGTH = 2048K - 0x100
+    RAM   : ORIGIN = 0x20000000, LENGTH = 256K
+}
+
+SECTIONS {
+    /* ### Boot loader */
+    .boot_loader ORIGIN(BOOT_LOADER) :
+    {
+        KEEP(*(.boot_loader));
+    } > BOOT_LOADER
+} INSERT BEFORE .text;
\ No newline at end of file
diff --git a/src/main.rs b/src/main.rs
new file mode 100644
index 0000000..7194ab3
--- /dev/null
+++ b/src/main.rs
@@ -0,0 +1,140 @@
+#![no_std]
+#![no_main]
+
+use core::u16::MIN;
+
+use cortex_m::singleton;
+use defmt::info;
+use defmt::{println, write};
+
+use defmt_rtt as _;
+use embedded_hal::pwm::SetDutyCycle;
+use panic_probe as _;
+
+// Alias for our HAL crate
+use rp2040_hal as hal;
+
+// A shorter alias for the Peripheral Access Crate, which provides low-level
+// register access
+use hal::fugit::RateExtU32;
+use hal::pac;
+
+// Some traits we need
+use embedded_hal::digital::OutputPin;
+use embedded_hal::digital::{InputPin, StatefulOutputPin};
+
+/// The linker will place this boot block at the start of our program image. We
+/// need this to help the ROM bootloader get our code up and running.
+/// Note: This boot block is not necessary when using a rp-hal based BSP
+/// as the BSPs already perform this step.
+#[unsafe(link_section = ".boot_loader")]
+#[used]
+pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
+
+/// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
+/// if your board has a different frequency
+const XTAL_FREQ_HZ: u32 = 12_000_000u32;
+
+// below this we won't be able to turn on the transistor (0.6v)
+const MIN_DUTY: u16 = 12000;
+
+#[rp2040_hal::entry]
+fn main() -> ! {
+    // Grab our singleton objects
+    let mut pac = pac::Peripherals::take().unwrap();
+    let core = pac::CorePeripherals::take().unwrap();
+
+    // Set up the watchdog driver - needed by the clock setup code
+    let mut watchdog = hal::Watchdog::new(pac.WATCHDOG);
+
+    // Configure the clocks
+    let clocks = hal::clocks::init_clocks_and_plls(
+        XTAL_FREQ_HZ,
+        pac.XOSC,
+        pac.CLOCKS,
+        pac.PLL_SYS,
+        pac.PLL_USB,
+        &mut pac.RESETS,
+        &mut watchdog,
+    )
+    .unwrap();
+
+    let mut delay = cortex_m::delay::Delay::new(core.SYST, 133_000_000u32);
+    // The single-cycle I/O block controls our GPIO pins
+    let sio = hal::Sio::new(pac.SIO);
+
+    // Set the pins to their default state
+    let pins = hal::gpio::Pins::new(
+        pac.IO_BANK0,
+        pac.PADS_BANK0,
+        sio.gpio_bank0,
+        &mut pac.RESETS,
+    );
+
+    let mut adc = hal::Adc::new(pac.ADC, &mut pac.RESETS);
+    let mut adc_pin = hal::adc::AdcPin::new(pins.gpio26.into_floating_input()).unwrap();
+    let mut adc_fifo = adc
+        .build_fifo()
+        .clock_divider(0xFFFF, 0xFF)
+        .set_channel(&mut adc_pin)
+        .start();
+
+    let mut pwm_slices = hal::pwm::Slices::new(pac.PWM, &mut pac.RESETS);
+
+    let pwm = &mut pwm_slices.pwm2;
+    pwm.set_div_int(125);
+    pwm.set_ph_correct();
+    pwm.enable();
+
+    let pwm_channel = &mut pwm.channel_a;
+    pwm_channel.output_to(pins.gpio20);
+
+    // let mut led_pin = pins.gpio25.into_push_pull_output();
+
+    let mut duty = MIN_DUTY;
+
+    let mut power = 0;
+
+    let mut tick = 0u16;
+
+    loop {
+        pwm_channel.set_duty_cycle(duty);
+        duty = duty.saturating_add(2000);
+
+        delay.delay_ms(10);
+        if adc_fifo.len() > 7 {
+            let mut samps = [0u16; 8];
+
+            for i in 0..8 {
+                samps[i] = adc_fifo.read();
+            }
+
+            let avg = avg_fifo(&samps, false);
+            let voltage = (avg * 3300) / 4095;
+
+            let new_power = (voltage * (duty - MIN_DUTY) as u32) / 0xFFF;
+
+            if tick % 10 == 0 {
+                info!("{} duty, {}mV, {} power", duty, voltage, new_power);
+            }
+            tick = tick.wrapping_add(1);
+
+            if new_power < power {
+                duty = MIN_DUTY.max(duty - 3000);
+            }
+
+            power = new_power;
+        }
+    }
+}
+
+fn avg_fifo(samps: &[u16], log_all: bool) -> u32 {
+    let mut avg = 0u32;
+    if log_all {
+        info!("{}", samps);
+    }
+    samps.iter().for_each(|n| {
+        avg += *n as u32;
+    });
+    avg / (samps.len() as u32)
+}